Synthetic Aperture Radar (SAR) is a high-resolution microwave imaging radar that can obtain the scattering information of ground targets by microwave irradiation all day and around the clock. It is an important means to obtain ground information, so it is used in military and civilian applications. It has been widely used in the field. Synthetic Aperture Radar (SAR) simulation technology is a simulation method to study SAR technology, which plays an important role in the research and development of SAR. This technology can simulate the SAR echo, be used for the inspection and testing of SAR system performance, and can evaluate various imaging algorithms and analyze the effectiveness of algorithms based on different models. In recent years, many universities and research institutions at home and abroad have invested a lot of manpower and material resources in the research of synthetic aperture radar simulation technology. With the research and development of SAR, the corresponding simulator development has also achieved fruitful results. Among them, high-speed data processing on hardware is one of its key technologies. Data storage capacity is another problem for high resolution, large swath synthetic aperture radar simulators. Aiming at the big data throughput energy and strong data computing power required for real-time signal processing of synthetic aperture radar, it is necessary to find a solution based on high-speed digital circuit. TS101 is the latest TIgerSHARC series DSP chip from AD Company of the United States. It adopts DMA engine and is mainly used for embedded real-time applications. The TIgerSHARC DSP has two independent 32-bit processor cores or a multiple instruction multiple data stream (MIMD) architecture. Each processing unit can perform a multiplication in a single cycle, as well as an addition. For a 300 MHz ADSP TS101S, it can generate 6 FLOPs per cycle with a peak processor capability of 1800 MFLOPs. TIgerSHARC is designed for a variety of signal processing, providing a 64-bit shared system bus and four link ports. The transfer rate of data on the external bus can reach 800 MB/s. In addition, data can also be transmitted through the link port, and the transmission rate of each link port reaches 250 MB/s. The entire TigerSHARC chip has an I/O bandwidth of 1 800 MB/s. The selected real-time signal processing board is based on the standard CPCI bus, and four TS101s form a parallel processor of the shared bus, and the DSP uses link port communication. The onboard memory is expanded to 2 GB, which meets the large storage capacity and strong computing power required by the SAR signal simulator. Principle and Implementation of 1 SAR Echo Simulator 1.1 Principle of SAR echo signal simulator From the technical analysis of the above high-resolution SAR simulation system, it can be seen that the high-resolution simulator design must solve the problem of speed and capacity. This paper proposes a DSP-based system implementation method. The block diagram of the SAR echo simulator is shown in Figure 1. As can be seen from the block diagram, the system can be divided into four parts: echo signal generation, D/A conversion, quadrature modulation, and up-conversion. Among them, SAR echo signal generation is an important part of the system. With the CPU motherboard, various scene parameters can be set in real time by connecting the display device and using the human-machine interface, and transmitted to the DSP on the general-purpose signal processing board through the CPCI bus. The processor calculates the SAR echo pulse in real time by the DSP, and then passes through D/A conversion, quadrature modulation and upconversion to the receiver. 1.2 SAR echo signal simulator system hardware components The real-time signal processing of SAR echo signals lies in the real-time signal processor. In the design and selection of real-time signal processing system, the appropriate high-speed DSP processor must be selected according to the system requirements to complete the tasks required by the system. The main hardware of the real-time signal processor consists of multiple DSP signal processing boards, CPU boards, DAC boards, standard CPCI chassis and power supplies, and display monitoring equipment CRT. Aiming at the big data throughput energy and strong data computing capability required for real-time signal processing of synthetic aperture radar, it is decided to use the TS101 chip of American AD Company as the DSP processing chip of real-time signal processor. Combining various factors, the final selected DSP signal processing board is shown in Figure 2. The board can provide 7.2 GFLOPs processing capacity and 2 GB of extended memory. The board form is a standard CPCI 6U board, which fully meets the real-time processing power and large memory requirements of SAR real-time echo processing.
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